Reconfigurable and Edgeless ROIC for Large Area Single-Photon Counting Imagers without Deadtime

Fahim, Farah

doi:https://doi.org/10.21985/n2-2qbs-0b87

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Reconfigurable and Edgeless ROIC for Large Area Single-Photon Counting Imagers without Deadtime

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Hybrid pixel detectors, comprising of pixelated sensors coupled to readout integrated circuits (ROICs) with complex in-pixel processing, are essential for many of today’s scientific instruments and imaging systems. Large-area detectors are required in a variety of systems: from detectors for synchrotron beamlines to telescopes for astronomy, which range from a few cm2 to a few hundred m2. The need for increased pixel functionality, ideally including a degree of programmability, has grown in parallel to the conflicting requirement for smaller pixel sizes for higher resolution. High-density vertical integration provides a third dimension for expansion, which allows for increased functionality, while maintaining a small pixel area. In order to create large sensing areas without any sensing dead zone, an array of several ROICs must be bonded to a large wafer scale sensor. The size of the ROIC is restricted by fabrication to a few cm2. This must include peripheral functionality as well as inputs and outputs for each ROIC, which constitute inactive areas. The advent and increased reliability of 3D integration technologies with high-density interconnects has made new routing and I/O paradigms available to designers. This gives rise to some interesting questions: is it possible to utilize 3D integration in devices to create a truly edgeless readout integrated circuit (ROIC) that is 4-side tileable? Can peripheral functions be ‘virtually absorbed’ within the pixel area to achieve the edgeless ROIC goal? Can we exploit the large backside surface of the ROIC for data transfer instead of its perimeter to obtain higher readout speeds using parallel paths? Moreover, reticule size ROICs for pixel detectors have complex analog, digital and mixed signal functionalities with transistor numbers greater than hundreds of million. Can a design methodology be established which demonstrates the use of industry standard tools to achieve the design and layout goals? This could lead to future detectors with 0% inactive areas, limited only by size of the sensor wafer, or even larger with the advent of edgeless sensors. As pixel detectors have evolved over the last few decades from hundreds of pixels to a few giga pixels, the readout of those pixels has itself evolved from simple analog readouts to fast digital readouts. As the area of the detector increases, readout speed decreases as data transfer from the central areas of the detector takes longer in a 2D system with increased serialization. Again, this gives rise to the question can 3D integration maintain high-speed in the system, even as the area increases from a few kilo pixels to a few mega pixels. For most applications, efficiently utilizing readout bandwidths has become essential. To this effect, it is advantageous for the same detector and ROIC to be able to simultaneously operate different regions of interests in different modes, such as full-frame imaging and zero-suppressed readout, to perform advanced imaging techniques such as foveation. With highly programmable readouts capable of performing multiple functions, is it possible to seamlessly switch between various functions and readout modes, without loss of data, while maintaining synchronization with the data acquisition system, and without impacting analog performance or creating dead-time in the system? The goal of this work is to explore and implement novel designs to enable vertically integrated, edgeless ROIC with complex in-pixel processing and high-speed, dynamically configurable readout such that different regions of the same ROIC could independently be reconfigurable to perform different functions.

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